For reducing device feature sizes, current techniques generally employ the Damascene process for forming an interconnect structure. A conventional process of manufacturing an interconnect structure may include the steps of first forming an opening in a dielectric layer on a substrate, and then depositing a barrier layer and a seed layer on the surface of the dielectric layer and on the surface of the opening. Thereafter, the process may also include depositing a metal layer filling the opening and covering the seed layer disposed on the dielectric layer, and then planarizing the deposited metal layer.